The present invention generally relates to a semiconductor device, and more particularly to an improvement in adhering structural elements, such as a package and a cover, to each other. Further, the present invention is concerned with a method of producing such a semiconductor device.
Recently, semiconductor chips of large sizes have been used in order to realize a high integration density. As the semiconductor chip size increases, a package which accommodates a semiconductor chip also increases. A lid (which is also referred to cap or cover) is, for example, adhered to a stage surface of the package by an adhesive. It is necessary to obtain a sufficient strength of an adhesive portion between the package and the lid, particularly when the package accommodates a large-size semiconductor chip.
Referring to FIG. 1, there is illustrated a conventional frit seal type semiconductor device 1. FIG. 2 is an enlarged diagram of a portion surrounded by the chain line shown in FIG. 1. The semiconductor device 1 is composed of a ceramic package 2, a semiconductor chip 3 on which integrated circuits are formed, a lid 4 and a glass layer 5. The ceramic package 2 has a recess portion in which the semiconductor chip 3 is accommodated. The lid 4 is adhered to a stage (upper) surface of the ceramic package 2 by the glass layer 5. Generally, as the chip size increases, a weight applied to the lid 4 is varied in order to improve reliability of sealing the semiconductor device.
The applicants conducted a thermal shock test based on an MIL standard, MIL-STD-883C 1011 COND.A, in which samples of the semiconductor device 1 shown in FIG. 1 are alternately put into a chamber maintained at 0.degree. C. and a chamber at 100.degree. C. The results of the thermal shock test are shown in Table 1, which will be shown later. When the alternate putting operation was repeatedly carried out about 300 times, a crack took place in a portion of the glass layer 5 along a peripheral edge of the lid 4 of each of all the samples. This means that the adhesive strength between the glass layer 5 and the ceramic package 2 is not sufficient and the adhesive portion is weak in thermal shocks.
The reasons are considered as follows. The stage surface 2a of the ceramic package 2 has a roughness between about 0.3 and 0.4 when it is expressed by a center line average roughness Ra. As is known, the center line average roughness Ra is defined as Ra=(1l).intg..sub.o .vertline.f(x).vertline.dx where x represents the direction of a center line, l is a measurement length, and f(x) (=y) is a roughness curve. Thus, a sufficient anchor effect is not obtained where the anchor effect shows the degree of adhesion. A meniscus portion 5a (peripheral taper portion) of the glass layer 5 is a convex portion. As a result, a portion of the glass layer 5 outward extending from the edge of the lid 4 does not a sufficient length `a`, and thus the adhesion area is small. Further, the difference between the coefficient of thermal expansion of the ceramic package 2 and the coefficient of thermal expansion of the glass layer 5 affects the occurrence of cracks. Similar problems occur between the semiconductor chip 3 and the package 2.